Workshop Presentation from DAC2015: A Holistic Platform for Education in ASIC Design & Manufacturing

I was fortunate enough to be invited by Cadence to present at a Workshop 9: Interdisciplinary Academia Industry Collaboration Models and Partnerships at DAC 2015 in San Francisco.

Here is the presentation I gave, "A Holistic Platform for Education in ASIC Design & Manufacturing" on our current work with undergraduates on SoCs.

Just P&R'ed and unconstrained SoC using Cadence Encounter

Excellent, a LEON3, DDR controller, misc peripherals using a ST Microelectronics 120nm process from CMP. It was badly done, unconstrained and in all likelihood completely non-functional but it is a real start.
Taking it forward:

1. Verifying the rc generated verilog netlist is functionally correct. Modelsim will work for us here.
2. Using rc to generate the netlist from two technology files: Low Leakage and High Speed to allow the critical path to run faster.
   
3. Generalizing the setup of Encounter such that it fully uses the whole designkit in an easy-to-use package.
   
4. P&R'ing a whole SoC.
5. Verifying the back-extracted layout is fully correct.
   

Cadence Encounter SEGV on start faults cured II

New diagnosis: The problem occurs when it attempts to display the window on Fedora Core 8 with or without compiz. I wonder if it ever worked? New cure: SEE LATEST POST ON THIS

xorg-x11-server-Xorg-1.3.0.0-47.fc8
Linux **** 2.6.25.14-69.fc8 #1 SMP Mon Aug 4 14:00:45 EDT 2008 x86_64 x86_64 x86_64 GNU/Linux

Dump of problem:

encounter
This version requires license using cdslmd daemon.
Checking out Encounter license ...
SOC_Encounter_GXL 6.2 license checkout succeeded.
INFO: Current OA version selected: OA22
Starting console server on port esdcad4.ecs.soton.ac.uk:8888 ..
sourcing /home/esdcad/software/cadence/linux/soc62_USR4/tools/fe/etc/rdaDSL.tcl
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@(#)CDS: First Encounter v06.20-s285_1 (32bit) 03/20/2008 18:59 (Linux 2.4)
@(#)CDS: NanoRoute v06.20-s222 NR080304-1637/USR54-UB (database version 2.30, 58.1.0) {superthreading v1.10}
@(#)CDS: CeltIC v06.20-s075_1 (32bit) 03/06/2008 22:51:18 (Linux 2.4.21-37.ELsmp)
@(#)CDS: CTE v06.20-s256_1 (32bit) Mar 20 2008 15:56:31 (Linux 2.4.21-37.ELsmp)
--- Starting "First Encounter v06.20-s285_1" on Thu Sep  4 15:05:31 (mem=62.9M) ---
--- Running on esdcad4.ecs.soton.ac.uk (x86_64 w/Linux 2.6.9-78.0.1.ELsmp) ---
This version was compiled on Thu Mar 20 18:59:03 PDT 2008.
Set DBUPerIGU to 1000.
Set Default Mode Capacitance Scale Factor to 1.00
Set Detail Mode Capacitance Scale Factor to 1.00
Set Coupling Capacitance Scale Factor to 1.00
Set Resistance Scale Factor to 1.00
Set net toggle Scale Factor to 1.00
Set Shrink Factor to 1.00000
Encounter terminated by internal (SEGV) error/signal...
*** Stack trace in log file.