Synopsys Designware System Level Library Compiled

Rebuilding everything from scratch with a clean install, and setting the following environment variables:

CC /usr/local/gcc/3.3.6/bin/gcc
CXX /usr/local/gcc/3.3.6/bin/g++
LD /usr/local/gcc/3.3.6/bin/g++

and look

Synopsys Innovator and Designware System Level Library II

More things to do with Synopsys Designware System Level Library.

Just so you know:

When they say use gcc-3.3.6, they mean gcc-3.3.6. RHEL3 shipped with gcc-3.2.X and RHEL4 with gcc-3.4.X. Both build models without errors but when executed segfault.

I am building a copy of gcc-3.3.6 now following this excellent guide by Tellurian.

More to follow.

MSc Dissertation Titles for 2009

1. An OpenSPARC with Hypertransport
Add a memory mapped Hypertransport port to an OpenSPARC processor.

2. SystemC to Reality
Take the Synopsys innovator SystemC based example of an MP3 player and
convert as much as possible to real hardware to assess the accuracy of
the Virtual Platform Model using the EVE accelerator.

3. Accelerating Geometric Mathematics
Taking the departments Geometric Maths co processor design and attaching
it to an IBM PowerPC 405 processor (either memory mapped or via the
coprocessor port) as efficiently as possible.

4. Hardening Soft Cores, the advantages and problems
Take the LEON3 opensource Sparc v8 processor and the IBM PowerPC 405
processor softcores (one is VHDL, one Verilog) and study them for speed
and size optimisations using blocks inside an FPGA like embedded
ram/multipliers. The LEON3 is already optimised and will serve as an
example.

5. Bi-width Processing for Sensor Applications
Research and design a processor with 2 data word widths - 8bits for low
power mode and an additional 32 bits when turned into high power mode.

Research the LEAP architecture first and try to improve it.

Synopsys Innovator and Designware System Level Library

THESE PROGRAMS ARE DEFINITELY 32 BIT

SystemC is perfectly happy on x86_64 however the pre-compiled libraries shipped inside the Designware System Library are not. Ah-ha, you say, "I shall compile them in 32 bit mode". However there is a problem: they depend on qt-devel.i386 which can't be installed on the same system as qt-devel.x86_64. So there.

Another word of warning for the clever:

THE BUILD SCRIPTS WILL WORK, BUT GENERATE EXECUTABLES THAT SEGFAULT.

Make/g++ don't quit on the qt linking error. Several hours of condensed hacking wasted as I didn't spot it. Another reason to use virtual machines to avoid these kinds of problems when using CAD tools. [see above for more details on the segfault issues]

Where to go from here: System C + Hardware/Software Codesign?

The GRLIB components and tools by being GPL'ed and available in VHDL form are a serious attraction for Hardware/Software Codesign.

It isn't quite clear yet how usable/possible this will be, but it would allow us access to real, selectable hardware examples. Quite a proposition.