Workshop Presentation from DAC2015: A Holistic Platform for Education in ASIC Design & Manufacturing

I was fortunate enough to be invited by Cadence to present at a Workshop 9: Interdisciplinary Academia Industry Collaboration Models and Partnerships at DAC 2015 in San Francisco.

Here is the presentation I gave, "A Holistic Platform for Education in ASIC Design & Manufacturing" on our current work with undergraduates on SoCs.

EWME2010 and Synopsys' EDK

Firstly EWME 2010 is coming in May. It is the European Workshop on Microelectronic Education which along with its sister conference in the USA, Microelectronic Systems Education (MSE), is pretty much unique in the world.

If you need help or advice on starting a programme at your institution then this is a great opportunity to meet a very cohesive, dedicated group of educators.

EWME and MSE are characterised by fair and honest discussions on the challenges and tools available to educators in this sphere, along with a showcase of our best student projects and modules. Papers detail how to run the course administratively as well as the practical aspects. We also get a few vendors who are always pleased to get you into contact with the appropriate University Programmes.

Secondly the Synopsys 90nm EDK and our experiences with it. We have been users of this EDK for about a year now and it forms a great basis for working with our students. Partially because of the established notes and curriculum resources make it very quick to get off the ground with several complex areas. Compared to the IDESA Advanced Digital Physical Implementation Flow course which promotes the TSMC 90nm deisgn kit this one is far more student friendly with a lower startup cost (it also doesn't require attendance to get the notes and access to the labs). [However for research the IDESA course is a fantastic introduction to 90nm and below.]

See you at EWME 2010 in Darmstadt!

Off to Microelectronic Systems Education

...in sunny San Francisco.

MSE Conference (and its partner EWME) provide a fantastic venue to explore and demonstrate novel ways to teach complex system-on-chip designs.

I shall also be attending the tutorials - One on the Cypress PSoC platform, a fascinating combination of a digital microcontroller, a programmable logic device and a section of programmable analogue logic. The second will be on several techniques from Synopsys:

1. Structured Methodology for Successful Low Power Verification
2. Power-Performance Optimization of Digital Circuits

DATE2009

What a great conference. I attended the workshop on Embedded Multicore computing as well as a similar tutorial.

Lots of very good people here with good ideas. Got the chance to get some real IC architecting off the ground and acquired a lot of good material for the SystemC based architecture course.

ESSCIRC Summary...

Sorry for the lack of daily updates. What can I say? Every day was an 8:30 start, finishing at 18:00 sometimes. This is without anyone leaving in the sessions I was in, which if you have ever been to a conference is really unusual.

An interesting combination of academic, student and company presentation. Interestingly the companies typically showed much more finished products.

Anyway it was really well worth the visit (not to mention the whiskey tasting or the visit to murrayfield....)

Day 1 Done

I particularly liked the plenary Technology Interfacing for Fabless Semiconductor Companies by
Vahid Manian. For those who don't know he works for Broadcom. It was really interesting hearing how they manage their relationships with the CMOS foundries and how much effort they put into owning their own cell libraries and techniques.

More to follow....

Catch up with me at ESSCIRC next week

ESSCIRC 2008, Edinburgh. I am really looking forward to this conference, and I am meeting up with Cadence and NMI to discuss the Cadence Academic Network. Should be good.

Look out for me with a badge from Southampton University.