Update to AHB Slave Shenanigans and Massive Modelsim Migranes

AHB Slave Shenanigans: The HREADY signal is supposed to be an input from all the other AHB slaves such that they all can note that a slave is hanging the master.

Massive Modelsim Migranes: After a lot of messing about I found out the following solution (for 64 bit linux on amd64 and intel amd64 ext systems):

libhm = $MODEL_TECH/../linux_x86_64/libhm.sl

instead of the libhm.sl line in step 4 of this article from Xilinx. This applies to Modelsim SE 6.3f and the Rocket IO (or Rocket I/O?) module called MGT internally and the SmartModel SWIFT models included in Xilinx ISE9.2i.