Matthew's Mumblings

Then I can't plug Digilent enough. They have two very large FPGA boards available for very keen prices. The first is the Xilinx XUP , w...

AHB Slave Shenanigans: The HREADY signal is supposed to be an input from all the other AHB slaves such that they all can note that a slave ...

Which, to me is great news. Up till now I have been using the excellent Xilinx XUP board however it has one real failing: the ports labelle...

Basically the system now claims it cannot see the DDR! Which is a blow. I don't know why but I am getting the dreaded 'stack pointer...

I am currently building and deploying Snapgear linux onto a LEON3 system aboard a xilinx-xup board. However I have several issues with Snapg...

... and even better it doesn't have the old jtag programmer onboard so it works with GRMON! So much better than the serial debug system ...

I have offered the following MSc projects: Remove the LEON3 core and substitute an OpenSPARC (possibly the single core, wishbone compatible ...

Here is the first console dump of my executing linux session (the image.dsu was borrowed from the theora project). I shall have to consider ...

... via the JTAG debugger but I am still unable to drive the DDR due to the lack of DCM modules in this particular Xilinx. I am now turning ...

Heh, should have realised it wouldn't be that easy... Basically the ML403 differs from the ML401 & 2 by the fact that they both thei...