I have offered the following MSc projects:
- Remove the LEON3 core and substitute an OpenSPARC (possibly the single core, wishbone compatible variant).
- Build a SATA controller
- Explore the LEON3 GRLIB design space on ASIC and FPGA (i.e. how fast, how big, etc)
- Build an AHB parallel port (high speed, of course. Maybe a bit of a ram buffer?)
- Enable the Xilinx-XUP board's CF card to program the FPGA, install a boot loader and boot linux.
They are all different vairants of tricky, with 5 probably a real problem in disguise. I think it would be best for the boot loader to be part of the FPGA (i.e. a 1k ROM or similar) to boot off the CF card.
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