Saturday, September 19, 2015

Dr. Matthew A. Swabey - Resume / Curriculum Vitae

Quicklinks: Professional Career | Education | Current Teaching and Administration | Awards & Proposals | Industrial Activities | Papers & Articles | Skills & Experience | Professional Affiliations | Board Memberships | Previous Teaching & Administration

Professional Career

  • February 2011 – Present: Deputy Director of Instructional Labs, ECE, Purdue University. Successfully negotiated a license and free fabrication on TI LBC7 BiCMOS for Purdue undergraduates (one of two in the world). Teaching an undergraduate project team that fabricates and tests custom mixed signal ARM® Cortex®-M0 SoCs. Developed an AMBA compatible DDR memory controller including analog IP for LBC7 using Denali memory IP. Developed various IP blocks around AHBLite. Developing analogue and mixed signal laboratory curriculum and facilities for three classes in ECE including EE Senior Design, a total of ~1000 students per semester. Managing a diverse team of three full time staff, temporary staff, ~20 teaching assistants and ~30 undergraduate lab assistants. Controlling budget spend of approximately $500k - $1million per year. Partnering with Dr. M. Johnson to run undergraduate ASIC mixed signal SoC design teams that fabricate and test custom integrated circuits as projects.
  • February 2009 - February 2011 (- Present as visitor): Researcher with the ARM-ECS Industry-University Center identifying and establishing relationships with ARM engineers, licensing IP, EDA tools and installing new flows. Established the Southampton/ARM secure research island. Assisted with the design, validation and DRC of the Tokachi-1&2 and Tokachi-3M TSMC 65nm research SoCs. Validated and tested the pre-release version of the ARM Cortex M0 DesignStart™ Processor. Personally taped out a simple ARM Cortex M0 IC to validate the core and our IBM® 8RF flow. Published a series of articles describing how to modernize and adapt the IBM PowerPC™ 405-FS simulation, verification and build scripts to modern EDA tools.
  • August 2007 – February 2011: Teaching Fellow, ECS, Southampton University. Employed at the same grade as a lecturer/instructor with a remit to innovate in teaching. Developed and delivered teaching in computer architecture, analogue electronics, electronic laboratories, C programming laboratories, DSP laboratories and managed all the MSc projects and dissertations. Developed microelectronic EDA flows and the cluster computing facilities to run them.
  • July 2006 – July 2007: Research Fellow, ECS, Southampton University. Researcher (Engineering and Physical Sciences Research Council (EPSRC) grant EP/E015522/1) extending the previous PhD studies into creating an OAE based biometric. Principle work areas were: systematic data collection, signal processing, the design and construction of novel very low noise analogue interface circuits and DSP software.
  • April 2005 – June 2006: Research Fellow, ECS, Southampton University. Researcher (EPSRC grant GR/S45324/01) responsible for specifying, designing and building the infrastructure for studying renewable energy management in suboptimal sites. The embedded system developed consisted of a Gumstix (an Intel XScale based single board computer running Linux) controlling a network of bespoke intelligent active energy monitors via an I2C bus.

Education

School of Electronics and Computer Science (ECS), University of Southampton, UK:

  • 2007 – 2008: Postgraduate Certificate of Academic Practice This is a Master’s level qualification (PG Cert) in teaching at University level. It focuses on the development of discipline-specific teaching and learning approaches alongside core competencies.
  • 2001 – 2006: PhD titled “The Human Auditory System as a Biometric” This original research built on existing medical knowledge of otoacoustic emissions (OAEs). It required synthesizing a national medical dataset from separate studies and mathematically analysing it. Various parameterised identification algorithms were developed and an equal error rate of 1 in 1229 (0.0814%) was achieved. This was then verified against a smaller experimental dataset. A novel acquisition system was prototyped that improved on the existing medical systems by eliminating the requirement for a probe to be inserted into the ear canal. It used collector current tuned, discrete transistor ultra-low noise analogue designs.
  • 1998 – 2001: Upper Second Class Bachelor of Engineering (Honours) in Electronic Engineering with a First Class for my final year project
  • Final Year Project: “Mobile Multichannel Telemetry System”. The project consisted of specifying the data capturing requirements and subsequently developing and designing the hardware and software for a multichannel, multi-rate data logger. A modular C system that compiled to a time-sliced program running on my custom board using a Microchip PIC17 with a 433MHz radio link to a PC was created.

Plymouth College, Ford Park, Plymouth, UK:

  • 1992 – 1996:
  • A – Levels: Physics, Mathematics, Biology, General Studies
  • A/S – Level: Electronics
  • GCSEs: English Language & Literature, Mathematics, Physics, Biology, Chemistry, Electronics, Craft Design Technology, French, Latin

Current Teaching and Administration

  • Deputy Directory of Instructional Labs in ECE This is my present role and is covered above.
  • DL2 Laboratory Remodel One of the principle individuals involved in the $2.5 million dollar redesign of our current laboratory facilities to support approximately 50% of the ECE classes.
  • ECE 20700 Electronic Measurement Techniques This lab based course introduces and trains hundreds of students per semester in the use of essential electronic laboratory equipment. The learning context is realistic measurement situations and electronic constants.
  • ECE 20800 Electronic Devices and Design Laboratory This lab based course introduces the basic semiconductor devices from the p-n junction to the MOS transistor and finally the operation amplifier. Students have to design suitable bias circuits, verify and optimize them using SPICE.
  • ECE 40200 EE Design Projects This capstone course provides the essential ABET mandated senior design experience. Each semester requires the design of a technically challenging open-ended electrical-engineering project that will run each semester and then administrate and examine all the students.
  • ECE 49595 ASIC Fabrication and Test I & II The first semester of a two-semester sequence to give teams of 3 to 6 students the experience of designing an ASIC, having the chip fabricated, and testing it. The team of students will develop requirements for a design, prepare the design using VHDL, Verilog, create and use test benches to functionally verify the design, use automated tools to prepare a circuit layout, verify the final layout, submit the layout for fabrication, prepare a physical test bed, test or demonstrate the chip, and document all aspects of the design and test results

Awards & Proposals

  • Integrated Coherent Comb and Line-by-Line Pulse Shaper for RF Photonic Filtering (DARPA W3194Q-13-1-0018): Miniaturizing the existing Purdue development of 60GHz AWG technology developed by Prof. Andrew M. Weiner, Daniel E. Leaird and others.
  • HKN Turkey Contest Winner: Raised over $500 dollars for charity in competitive bidding on the understanding I would wear a Turkey Suit for a whole day, including teaching.
  • JISC Research Data Programme (call 07/09): Proposal submitted July 2009 for £200,000 to fund investigations into the preservation and visualisation of stored research data inside virtual machines.
  • JISC Information Environment and e-Research (call 12/08): Proposal submitted February 2009 for £310,000 to fund the creation of a virtual machine enhanced e-repository to contain machine images alongside existing document types.
  • Synopsys’ Charles Babbage Grant 2009: This was awarded to the School of ECS based on the proposal co-written by myself and Professor David Flynn, ECS & ARM.
  • Vice-Chancellor’s Teaching Award 2008: “ELEC2017/8 D2 Design Exercise: Engineering Chip Design (ASIC)”, this award is for ECS’s flagship ASIC design exercise taken by all year 2 electronics students in teams of 6. It is split into two parts: design and simulation, then after silicon fabrication (4 months), testing and evaluation.
  • Best Paper Prize ICBA 2004: “Using Otoacoustic Emissions as a Biometric”. This was the first paper published in this area on my research into using OAEs as a biometric characteristic

Industrial Activities

  • Cadence: Engaged in close collaboration to bring simple-but-good EDA flows targeting mature and advanced silicon nodes.
  • Texas Instruments: Successfully petitioned them to license their LBC7 BiCMOS process and related IP to allow Purdue undergraduates to experience a genuine CMOS design experience. I continue to work closely with their University team.
  • ARM: Worked on validating and testing a pre-release version of the ARM Cortex M0 DesignStart IP for University Access.
  • Spirax Sarco: Mentoring in a Knowledge Transfer Partnership on a research programme based around Texas Instruments' C5000 DSP hardware.
  • Roke Manor: Consulted about the feasibility of a multiprocessor system on chip core technology being considered for deployment in a new ASIC.
  • IBM and Synopsys: A series of articles describing how to modernize and adapt the IBM PowerPC™ 405-FS simulation harness and build scripts to the modern versions of Design Compiler and DFT Compiler.
  • D4 Technology: C# based PC interface software and C based ZigBee Microcontroller firmware (Texas Instruments CC2430) for the basestation of a multichannel 1400 node network.
  • ECS: A packet radio beacon based on a Microchip PIC16 transmitting a base station packet at regular intervals on 433MHz for calibration and system testing.

 Books, Papers & Articles

Skills and Experience

Teaching:

  • Seven years of tutoring, lecturing, supervising projects and setting exams within Purdue (USA) and Southampton (UK) including invited participation in the software education working party and the analogue electronics working party. The working parties are tasked with improving student engagement and understanding in their respective areas.
  • Four years of postgraduate demonstrating within ECS including input into the structure and content of undergraduate electronic laboratories.
  • Provided reviews, guidance, advice and practical help to numerous third and fourth year undergraduate and MSc projects from 2001.

Management and procurement:

  • One of the drivers of the planning and design of space and facilities for approximately seven laboratory classes with a budget of $2.5 million USD.
  • Budgeting, staffing, fitting out with suitable lab equipment, software and consumables for eight Purdue Undergraduate Electronics Labs.
  • Deploying the Advanced Electronics Lab in ECS Southampton in 2008 to support cross departmental measurement and diagnostic work beyond the capabilities of individual research groups up to a frequency of 6GHz. This follows overseeing the commissioning of laboratories destroyed in the fire at Southampton in 2005.
  • Ongoing provision, licensing, installation and maintenance of part of the ECS CAD tool portfolio and IP portfolio (IBM, ARM, Cadence, Synopsys, Mentor Graphics, etc.).
  • Procurement and commissioning of a VMWare cluster, Linux servers and Sun CAD servers for research and teaching.
  • Production and maintenance of online (HTML/wiki) and print documentation.

Commercial and Industrial:

  • Established a strong relationship with Texas Instruments who are providing IP and microchip manufacturing for Purdue undergraduates for teaching purposes.
  • Established a strong working relationship with ARM and arm engineers enabling access to microelectronic IP suitable to pursue unique teaching opportunities.
  • Maintain Purdue’s relationship with Synopsys enabling access to pre-release tools, established through the Babbage grant, by creating material for their university curriculum and interacting with their engineers to integrate technologies into our courses where appropriate.
  • Maintained and extended the relationship with Imagination Technologies in Southampton involving them further in our undergraduate programme as a course sponsor and now a project sponsor. They are deploying their custom technology in our laboratories to enhance our MSc course in mobile electronics. ECS and Imagination are currently exploring joint research possibilities.

Electronics:

  • Prototyping Cadence Liberate flow to characterize analog IPs for use in the flow (IOs, DLLs).
  • Led an undergraduate team to develop a DDR memory interface on LBC7. Includes analog DLL and IOs. Testability, functional verification, verification IP and constraints were key.
  • Designed and implemented various HDL IP modules: ARM Cortex M0 Debug Unit, n-input transparent AHBLite bus matrix, ZBT synchronous SRAM controller, etc.
  • Designed and implemented power pads, corners and bi-directional IOs on TI LBC7.
  • Built EDA flows around IBM 8RF, TSMC 65nm using Chip-under-pad and Texas Instruments LBC7 BiCMOS. Included liaising with the MOSIS and Europractice MPW fab services. Building prototype ARM based SoCs (a simple ARM Cortex M0 based prototype) and the Tokachi-1&2 multicore research SoCs.
  • Designing and automating repositories for IC design data using git and Subversion. Automation of EDA flows targeting mixed signal development using Python. Experience with complete mixed signal design flow from specification to testing.
  • Successful mixed signal circuit designs built using radio modules.
  • Practical experience of hardware and software design for debugging.
  • Familiarity with Texas Instruments Code Composer and TMS320 DSP architecture.
  • Mixed signal design experience using Microchip PIC and Atmel AVR microcontrollers.
  • Verilog and System Verilog digital designs using Synopsys’ Design Compiler, Cadence Encounter, Synplicity Synplify (now Synopsys FPGA), Altera Quartus, Xilinx ISE and Mentor Graphic’s Modelsim/Questa.
  • PCB design and construction using Cadence Orcad tools and Altium Designer.
  • Extremely low noise audio frequency analogue circuit design using PSpice A/D.
  • Analogue CMOS CAD software Cadence Virtuoso (IC5 and IC6).

Software:

  • Microsoft Office to deliver teaching and presentations (PowerPoint), papers (Word) and financial activities (Excel).
  • LaTeX for larger documents such as theses and book drafts.
  • Extensive object oriented C++ experience including the standard template library.
  • Extensive C and assembler for paged/non-paged memory microcontrollers.
  • Matlab/Simulink and Octave mathematical languages.
  • Working knowledge of scripting languages: Python, Bash and (T)csh.
  • Experienced with the installation and management of Linux and Solaris CAD servers.
  • Proficient with Microsoft Windows 2000, XP and 7.
  • Previously maintained a Linux distribution for Sharp Zaurus PDAs (e.g. C760).

Professional Affiliations

  • Researcher at the ARM-ECS industry-university center, Southampton, UK
  • Member of the IEEE
  • Member of the Institution of Engineering and Technology
  • Fellow of the Higher Education Academy, UK

Board Memberships

  • Forum for Specification and Design Languages 2010, Local Technical Chair
  • Design, Automation & Test in Europe 2009, Chair of Local Organization Team (Technical Programme Meeting 2008)
  • 11th IEEE European Test Symposium 2006, Local Technical Chair

Previous Teaching & Administration

Purdue University, USA

  • ECE 30600 Electronic Circuits and Systems Laboratory Experiments in electronic circuits and systems including spectral analysis techniques, sampling, distortion measurements, random signals, signal-to-noise ratio and correlation.
  • ECE 30800 Systems Simulation and Control Laboratory Instruction and laboratory exercises in the solution of differential equations that arise in the modelling of physical systems. Instruction in the principles of operation and design of linear control systems.
  • ECE 44000 Transmission of Information Analysis and design of Analog and Digital Communication Systems. Emphasis on engineering applications of theory to communication system design. The laboratory introduces the use of advanced engineering workstations in the design and testing of communication systems.

Southampton University, UK

  • MSc Microelectronics Systems Design Programme Leader While I held this role I was responsible for the academic content, admission requirements and day-to-day running of one of the two largest MSc programmes within ECS.
  • Co-supervisor of a PhD Project in an industrial collaboration with Spirax-Sarco developing novel DSP algorithms and the sensor/DSP platform to support them.
  • Supervisor of 4 MSc Projects in the area of computer architecture, developing RFID enhancements to commercial systems and robust, general purpose, SoC IP modules.
  • ELEC6003 & COMP6029 MSc Project Course Leader Aim: To maintain and improve the MSc support framework, handle mitigating circumstances cases and manage the running of all MSc programme projects.
  • COMP6009 Individual Research Project & COMP6033 Independent Research Review Course Leader Aim: To instil in students the essentials of credible academic research, i.e. evaluation of previous work, synthesis of work across a field and finally credible presentation of novel material. Also I ensured the annual student conference was an opportunity for them to practise essential research presentation skills in a realistic setting to our industrial partners.
  • ELEC3031 Analogue Electronics Course Leader Aim: To cover in some depth the mathematics and circuitry likely to be used between an analogue signal source and a digital signal processing system, making maximum use of available integrated circuits.
  • ELEC2013 Computer Systems Engineering Aim: To give understanding and context of modern processor architecture.
  • ELEC2018 Software Development Aim: To develop the needed skills to become a competent programmer for larger software projects.
  • COMP1010 ‘C’ Programming Laboratories Aim: To provide the student with the necessary skills to write C programs for PCs and microcontrollers.
  • ELEC1013 Introduction to Digital Electronics Laboratories Aim: To provide a background in digital electronics to computer science students
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