- Remove the LEON3 core and substitute an OpenSPARC (possibly the single core, wishbone compatible variant).
- Build a SATA controller
- Explore the LEON3 GRLIB design space on ASIC and FPGA (i.e. how fast, how big, etc)
- Build an AHB parallel port (high speed, of course. Maybe a bit of a ram buffer?)
- Enable the Xilinx-XUP board's CF card to program the FPGA, install a boot loader and boot linux.
Friday, 27 June 2008
MSc Projects offered...
I have offered the following MSc projects: